The present invention relates to a liquid crystal display and a method for manufacturing the same, and more particularly to an active matrix liquid crystal display wherein the display characteristics thereof are improved by an increase in the aperture ratio and a reduction of the capacitance of the gate wiring, and to a method for manufacturing the same.
The present invention is an improvement over the invention which is the subject matter of the present inventors' co-pending U.S. patent application Ser. No. 08/070,717 which was filed on Jun. 1, 1993, the disclosure of which is hereby incorporated into this application by reference.
In response to a demand for personalized, space-saving displays which serve as the interface between humans and computers (and other types of computerized devices), various types of fiat screen or fiat panel displays, such as a liquid crystal display (LCD), a plasma display panel (PDP), an electroluminescent (EL) display, etc., have been developed to replace conventional display devices, particularly a cathode-ray tube (CRT) which is relatively large and obtrusive. Among these fiat panel display types, the progress of LCD technology attracts the most interest. In some forms, LCDs match or surpass the color picture quality of CRTs.
Liquid crystal displays can have a simple matrix form or an active matrix form, using an electro-optic property of the liquid crystal whose molecular arrangement is varied according to an electric field. In particular, the LCD in the active matrix form utilizes a combination of liquid crystal technology and semiconductor technology, and is recognized as being superior to CRT displays.
The active matrix LCDs utilize an active device having a non-linear characteristic in each of a plurality of pixels arranged in a matrix configuration, using the switching characteristic of the device to thereby control each pixel. One type of the active matrix LCD embodies a memory function through an electro-optic effect of the liquid crystal. A thin film transistor (hereinafter referred to as a "TFT") having three terminals is ordinarily used as the active device, or a thin film diode (TFD), for example, a metal insulator metal type (MIM) having two terminals, is used. In the active matrix LCD which utilizes such active devices, millions or even billions of pixels are integrated on a glass substrate together with pixel address wiring, to thereby provide a matrix driver circuit, with the TFTs serving as switching elements.
However, in the active matrix LCD whose display has a large screen and high definition, the number of the pixels increases. Accordingly, the aperture ratio of the individual pixels is decreased, thereby concomitantly reducing the brightness of the LCD.
In the meantime, in the above active matrix LCD, a capacitance (Cgd) results between the gate and drain electrode of the TFT. When the signal of the gate pulse is changed from "High" to "Low", the potential of tile pixel electrode is lowered due to tile effect of the above capacitance Cgd. This lowering potential change is conventionally referred to as "offset voltage". When the offset voltage is applied to the liquid crystal as a direct voltage, an unfavorable phenomenon such as image sticking, flicker generation etc., occurs. Therefore, reducing such an offset voltage is necessary, as by forming an auxiliary capacitor in parallel with the liquid crystal cell.
Further, to obtain uniformity of an image displayed on the active matrix LCD, it is necessary that the voltage of a first signal applied through a data line in a writing operation is held constant for a certain time until a second signal is received. Also, in order to improve the image quality of the display, an auxiliary capacitor is formed in parallel with a liquid crystal cell. When the writing operation to the LCD is performed at a frequency of 60 Hz, the retaining duration is 16.7 milliseconds. The time constant, which is determined by the resistance of the liquid crystal and the dielectric constant thereof, must be sufficiently large with respect to the above values.
The auxiliary capacitor in parallel with the liquid crystal cell may be formed in two ways; that is, as an additional-capacitance type (Ca type) cell or as a storage capacitance type (Cs type) cell.
FIG. 1 shows a pixel layout of a conventional liquid crystal display on which the additional capacitance type storage capacitor is formed and FIG. 2 is a cross-sectional view taken along line II--II of FIG. 1.
In FIG. 1, a single pixel region and portions of adjacent pixel regions surrounding it, are illustrated. In a complete LCD display, rows of a number of gate lines 1 and orthogonal columns of a number of data lines 5a are arranged in a matrix configuration. Thus, a pixel is formed in the regions bounded by these two kinds of lines. In each pixel region, an additional-capacitance type capacitor Ca, a thin film transistor (TFT) as a switching device, a light transmissive portion (aperture area), a transparent pixel electrode 4 and a color filter layer 21 are provided. Gate line 1 and data line 5a are referred to as a scanning signal line and a display signal line, respectively.
As can be seen in FIG. 1, the first electrode 10 of each additional-capacitance type capacitor Ca is formed as a tab-like portion projected into a respective pixel portion from the scanning signal lines 1. Similarly, the gate electrode G of each TFT is also formed as an integral tab-like portion projected into a respective pixel portion from the scanning signal lines 1 (in the opposite direction to the corresponding first electrode of the capacitor). Each TFT system comprises a semiconductor layer 3 formed over a gate electrode G, a tab-like perpendicularly protruding portion of display signal line 5a (drain electrode) adjoining the left end of semiconductor layer 3, a source electrode 5b adjoining the right end of semiconductor layer 3 and a transparent pixel electrode 4. Transparent pixel electrode 4 is comprised of a transparent conductive material such as indium tin oxide (ITO).
All of the scanning signal lines 1, display signal lines 5a, capacitors Ca, TFTs, and pixel electrodes 4 are formed as part of a multilayer structure formed on the inner surface of a rear glass substrate 100, as can be seen in FIG. 2.
The process for forming the LCD having the additional-capacitance type capacitors Ca is explained in more detail as follows. First electrode 10 of each auxiliary capacitor Ca and each scanning signal line 1 are simultaneously formed by appropriately patterning an opaque conductive material (e.g., of aluminum, chromium, molybdenum, or tantalum) deposited on the inner surface of the rear glass substrate 100 via a conventional photolithography process. Thereafter, an insulating layer 2 is formed over the scanning signal lines 1, first electrodes 10 of capacitors Ca and the exposed regions of the inner surface of the rear glass substrate 100 as shown in FIG. 2. Next, the display signal lines 5a and transparent pixel electrodes 4 are separately formed, e.g., by successive photolithography processes. Then, a protective layer 6 is formed over pixel electrodes 4, display signal lines 5a, and the exposed regions of insulating layer 2, to thereby complete the multilayer structure provided on the inner surface of the rear glass substrate 100.
With reference to FIG. 2, the prior art active matrix LCD further includes a front glass substrate 101 having a multilayer structure formed on the inner surface thereof, and oriented parallel to the rear glass substrate 100. For example, a light shielding layer (black) matrix 20 for light shielding is formed on the inner surface of front glass substrate 101. Light shielding layer matrix 20 is formed by appropriately patterning a light-shielding layer via a conventional photolithography process, to define an aperture area occupying most of each pixel electrode 4 arranged on rear glass substrate 100. Thereafter, a color filter layer 21 is formed over light shielding layer matrix 20 and the exposed areas of the inner surface of the front glass substrate 101. The color filter layer 21 includes light transmissive portions 21a disposed in the aperture areas. Next, a protective layer 22 is formed over the color filter layer 21. Then, a transparent electrode 23 is formed over protective layer 22, to thereby complete the multilayer structure provided on the inner surface of the front glass substrate 101.
It can be noted that the conventional active matrix LCD further includes a thin layer of liquid crystal sandwiched between the front glass substrate 101 and the rear glass substrate 100, and disposed in contact with transparent electrode 23 and protective layer 6. Subsequent process steps well-known to those of ordinary skill in the pertinent art are then carried out to fix front glass substrate 101 and rear glass substrate 100 using a conventional sealant (not shown), and the liquid crystal is injected and sealed within the cavity formed therebetween.
In the active matrix LCD of the additional capacitance type, since first electrodes 10 of the additional-capacitance type capacitors and scanning signal lines 1 are simultaneously patterned using the same material, an additional process is unnecessary. Accordingly, the process for making the active matrix LCD can be simplified.
However, based upon tile foregoing description of the conventional active matrix LCD, it should also be appreciated that tile prior art suffers from certain drawbacks, as follows. Because the first electrode 10 of each capacitor Ca is formed of an opaque metal, and further, because the first electrode 10 of each capacitor Ca overlaps a significant portion of its associated pixel electrode 4, the aperture area of each pixel is significantly reduced by the corresponding overlap area, thereby reducing the aperture ratio thereof.
Moreover, since the display signal lines 5a and pixel electrodes 4 are formed together on the same insulating layer 2, they must be separated by a predetermined distance so as to achieve electrical isolation therebetween. This reduces the aperture area of the LCD and thus lowers the contrast ratio and luminance of the LCD.
Additionally, since the first electrode 10 of the additional capacitance is connected to tile scanning signal line 1, i.e. the gate line, the wiring capacitance of the scanning signal line is much increased. Therefore, the load is increased when operating tile scanning signal line, to increase the propagation delay time of the gate pulse signal, i.e. the gate delay.
FIG. 3 is an equivalent circuit diagram of the LCD device of the conventional additional-capacitance type as shown in FIGS. 1 and 2. In tile unit pixel area defined by the scanning signal line 1 and the display signal line 5a, there exist capacitances such as the capacitance (Ccr) formed at the crossing portion of the scanning signal line 1 and tile display signal line 5a, the capacitance (Cadd) formed between the pixel electrode 4 and the first electrode 10 of the additional-capacitance type capacitor Ca, the capacitance (Clc) formed between the pixel electrode 4 and the liquid crystal, the capacitance (Cds) formed between the source and drain electrodes of the thin film transistor, the capacitance (Cgs) formed between the gate and source electrodes and the capacitance (Cgd) formed between the gate and drain electrodes.
FIG. 4 is a layout of a pixel of a liquid crystal display which has an independent wiring type storage capacitance type capacitor Cs formed in parallel with the liquid crystal cell, as another prior art method for forming the auxiliary capacitor. FIG. 5 is a cross-sectional view taken along line IV--IV of FIG. 4, and shows only the lower part of the liquid crystal display panel. Here, like reference numerals as those of FIG. 1 and FIG. 2 represent the same elements.
There has been proposed an active matrix LCD of the storage capacitance type which has an additional light shielding layer which reduces the light leakage and has an independent wiring type storage capacitor so as to improve the characteristics of a display (see "High-Resolution 10.3-in Diagonal Multicolor TFT-LCD," M. Tsumura, M. Kitajima, K. Funahata et al., SID 91 DIGEST, pp. 215-218).
In the active matrix LCD disclosed in the above paper, in order to obtain a high contrast ratio and high aperture ratio, a double light shielding layer structure is formed and the storage capacitor is formed by an independent wiring separately formed apart from the gate line, so as to improve the display characteristics of the LCD.
In the structure of the above double light shielding layer, a first light shielding layer is formed on a front glass substrate on which a color filter is provided as in the prior art, and a second light shielding layer is formed on a rear glass substrate on which the TFT is provided. The LCD having such a double light shielding layer structure exhibits an aperture ratio which is improved by 6-20% over the conventional LCD having only the first light shielding layer. Also, the storage capacitor utilizes a common electrode with the gate electrode formed of aluminum whose resistance is only one-tenth that of chromium (Cr). Thereby, the propagation delay characteristics along the scanning signal line is improved.
The LCD having the double light shielding layer structure and the aluminum common electrode still needs much improvement. Also, there is undesirably a reduction of the aperture ratio due to the usage of an opaque metal (aluminum) for forming the electrodes of the storage capacitor associated with each pixel.
Moreover, the process for fabricating the second light shielding layer entails installing a light shielding layer before forming an insulating layer merely shielding light during the manufacturing of the TFTs, thereby necessitating additional process steps which unduly increase the cost and complexity of the LCD manufacturing process.
As shown in FIG. 4, an independent wiring storage capacitance type capacitor Cs is a structure wherein a transparent,conductive material such as indium-tin oxide (ITO) replaces the opaque metal, e.g., the aluminum, in the above-mentioned conventional TFT-LCD. The light shielding layer structure formed around transparent pixel electrode 4 is not illustrated in FIG. 4 because it is not essential. FIG. 4 shows only part of a large number of pixel portions defined by a large number of scanning signal lines 1 and a large number of display signal lines 5a as shown in FIG. 1. Independent wiring storage capacitance type capacitor Cst is separated from scanning signal lines 1, differently from the additional capacitance type capacitor Ca shown in FIG. 1, so as to be connected with the capacitor Cs in the adjacent pixel portion by an independent wiring 11 formed as a different conductive layer.
As shown in FIG. 4, the LCD having the independent wiring storage capacitance type capacitor utilizes the inversely staggered TFTs as switching devices. If the forming process is observed, each gate electrode G which is formed such that each of scanning signal lines 1 is formed with a tab-like portion projected into each pixel portion, each first electrode 10a of each storage capacitor Cs and each independent wiring 11 which is an extension of the first electrode 10a are formed so as to be parallel to the rear glass substrate of the liquid crystal display panel. Successively, after insulating layer 2 such as with a silicon nitride (SIN) layer is formed on the front surface, a semiconductor layer 3 and a transparent pixel electrode 4 are formed in a predetermined pattern, and then the display signal lines 5a and the source electrodes 5b are formed thereon. Subsequent processes are accomplished by a method conventionally used in the LCD field.
Since the liquid crystal display of the independent wiring storage capacitance type capacitor as shown in FIGS. 4 and 5 utilizes transparent ITO for forming first electrode 10a of storage capacitor Cs, the aperture area does not decrease by as much as that of the opaque electrode type. Meanwhile, since the light shielding layer does not exist on the rear glass substrate of the liquid crystal display panel alongside the pixel electrode, the contrast ratio of the LCD is reduced significantly and an additional process is required for forming first electrodes 10a of storage capacitors Cs. (This process is performed by depositing an additional transparent conductive material such as ITO which is different from the opaque conductive material of the scanning signal lines and then etching the transparent conductive material.) Moreover, the manufacturing yield thereof is disadvantageous since the crossing portions of the wirings are increased when compared to the LCD as shown in FIG. 1.
FIG. 6 is an equivalent circuit diagram of the LCD device of the conventional auxiliary capacitor type as shown in FIGS. 4 and 5. In the unit pixel defined by the scanning signal line 1 and the display signal line 5a, there exist capacitances such as the capacitance (Ccr) formed at the crossing portion of the scanning signal line 1 and the display signal line 5a, the capacitance (Cst) formed between the pixel electrode 4 and the first electrode 10a of the opposing storage capacitor Cs, the capacitance (Clc) formed between the pixel electrode 4 and the liquid crystal the capacitance (Cds) formed between tile source and drain electrodes of the thin film transistor, the capacitance (Cgs) formed between the gate and source electrodes and the capacitance (Cgd) formed between the gate and drain electrodes.
In the LCD of the independent wiring storage capacitance type as shown in FIGS. 4 to 6, the capacitance of the gate wiring (Cin) may be calculated by the following equation (1). EQU Cin=Ccr+Cgs+1/[(1/Cgd)+{1/(Clc+Cst)}] (1)
In the meantime, in the LCD of the additional capacitance type as shown in FIGS. 1 to 3, the capacitance of the gate wiring (Cad) may be calculated by the following equation (2). EQU Cad=Cin+1/[(1/Cst)+{1/(Clc+Cgs)}] (2)
From the comparison of the above equations (1) and (2), the gate line capacitance of an additional capacitance type LCD is several times as much as that of a storage capacitance type LCD. Therefore, when operating the gate line of the additional capacitance type LCD, the load thereof is increased, which increases the gate delay.
From the above, although the manufacturing process of the additional capacitance type LCD is simplified, obtaining a uniform image is difficult due to the gate delay since the gate wiring capacitance is large. In the meantime, the gate wiring capacitance of the storage capacitance type LCD is small. However, forming the first electrode of tile storage capacitor using an opaque metal, which simplifies the manufacturing process thereof, also lowers the aperture ratio significantly. Forming the first electrode of the storage capacitor using a transparent material improves the aperture ratio, but necessitates an additional process. Both the auxiliary capacitor type LCDs have many crossing points of the wiring layers, which increases the possibilities for discontinuity defects or short circuiting of the wiring.
To improve the problems exhibited in the above-mentioned liquid crystal display of the additional capacitance type (FIGS. 1 to 3) and in that of the independent wiring storage capacitance type (FIGS. 4 to 6), S. S. Kim et. al (including one of the present inventors) have described an invention wherein the LCD includes a storage capacitance type capacitor structured with a ring electrode which faces a corresponding transparent pixel electrode and encloses the transparent pixel electrode in a ring, as filed on Aug. 25, 1992 as U.S. patent application Ser. No. 07/934,396 which is now U.S. Pat. No. 5,339,181.
The LCD disclosed in U.S. Pat. No. 5,339,181 will be explained below with reference to FIGS. 7 and 8. Here, the same reference numerals as those of FIGS. 1, 2, 4 and 5 represent the same components.
As can be seen from a comparison of FIG. 7 with FIGS. 1 and 4, the active matrix LCD shown in FIG. 7 is manufactured according to the conventional method except for the fact that the layout of first electrodes 10 of storage capacitors (i.e. storage capacitance type capacitors) Cs associated with each pixel electrode 4 is changed so that the first electrode 10 is arranged in the peripheral region of the pixel electrode 4 to thereby increase the aperture ratio and contrast ratio of the LCD as compared with the conventional LCD. In more detail, the opaque metal layer from which the display signal lines 5a and the first electrodes 10 of storage capacitors Cs are formed is patterned in a manner such that the first electrodes 10 of storage capacitors Cs substantially surround their associated pixel electrodes 4, and preferably, overlap (i.e., underlay) only a peripheral edge portion thereof. As can be seen more clearly in FIG. 8 (taken along line VI--VI of FIG. 7), the first electrode 10 of the capacitor Cs is disposed substantially beneath the matrix of the light shielding layer 20 provided on the inner surface of the front glass substrate 101, and does not extend into the envelope of the aperture area, thereby significantly increasing the aperture ratio compared with conventional active matrix LCDs.
Additionally, the first electrode 10 of each capacitor Cs formed along the periphery of each corresponding pixel electrode 4, serves as an additional light shielding layer, as illustrated in FIG. 8. That is, the first electrode 10 minimizes the amount of leakage light passing through the aperture area of the front glass substrate 101 from the region of the liquid crystal located outside of the envelope of the aperture area.
In the case of the conventional active matrix LCD depicted in FIG. 2, it can be seen that any extraneous light entering the front glass substrate 101 at an angle of incidence greater than .THETA..sub.1 is emitted through the aperture area of the front glass substrate 101. In the case of the LCD of U.S. Pat. No. 5,339,181, only extraneous light which enters the front glass substrate at an angle of incidence greater than .THETA..sub.2 is emitted through the aperture area of the front glass substrate as illustrated in FIG. 8. Excess light (or "leakage light") which strikes the front glass substrate whose angle is less than the angle of incidence .THETA..sub.2 is blocked by first electrode 10 of the adjacent storage capacitor. Thus, relative to the aforesaid prior art active matrix LCDs, the LCD of the U.S. Pat. No. 5,339,181 reduces the amount of leakage light emitted through the aperture area of front glass substrate 101 by an amount which is proportional to the difference between .THETA..sub.2 and .THETA..sub.1, thereby significantly increasing the contrast ratio.
Meanwhile, the liquid crystal display having the ring type electrode storage capacitor represents an improvement in display characteristics, i.e., a better aperture ratio, increased contrast ratio, etc. However, due to the introduction of foreign matter or in case of a weak insulating film at wiring crossings (the intersection of scanning signal lines 1 and display signal lines 5a), wiring fractures in scanning signal lines 1 and/or short circuits between scanning signal lines 1 and display signal lines 5a may occur, to thereby significantly lower the yield of manufactured liquid crystal displays.
In order to solve the problems of wiring fractures in scanning signal lines 1 and/or short circuits between scanning signal lines 1 and display signal lines 5a without reducing the aperture ratio and the contrast ratio, co-pending U.S. patent application Ser. No. 08/070,717 describes an invention wherein each row of adjacent first electrodes of the capacitors are electrically connected together using redundancy connecting conductors or wherein the LCD has duplicated scanning signal lines associated with each pixel and electrically connected to the first electrode of the capacitor.
FIG. 9 shows a pixel layout of a liquid crystal display according to one embodiment of the invention disclosed in the above U.S. patent application Ser. No. 08/070,717. Here, the same reference numerals as those of FIGS. 1 to 8 represent the same components.
Referring to FIG. 9, the liquid crystal display is the same as that having a ring-structured capacitor electrode as shown in FIG. 7 except that a redundancy connecting portion 12 is formed between the first electrodes 10 of the storage capacitors which are formed in each pixel region in a manner such that the first electrodes 10 of storage capacitors Cs substantially surround their associated pixel electrodes 4. Redundancy connecting portions 12 which are connected between the first electrode 10 of each one of the storage capacitors are simultaneously formed with a pattern of the first electrodes 10 and intersects display signal lines 5a with a dielectric film interposed therebetween.
FIG. 10 shows a pixel layout of a liquid crystal display according to another embodiment of the invention disclosed in the above U.S. patent application Ser. No. 08/070,717. Here, the same reference numerals as those of FIGS. 1 to 8 represent the same components.
Referring to FIG. 10, the liquid crystal display is the same as that having a ring-structured capacitor electrode as shown in, FIG. 7. The liquid crystal display shown in FIG. 10 is characterized by having its scanning signal lines duplicated as first scanning signal lines 1a and second scanning signal lines 1b as compared with the pixel layout of the liquid crystal display shown in FIG. 7 as described above. A plurality of the scanning signal lines which are each constituted by an electrode pair of a first scanning signal line 1a and a second scanning signal line 1b are arranged at predetermined intervals. Here, the pixel portions are defined within first and second scanning signal lines 1a and 1b and display signal lines 5a.
Moreover, as compared with FIG. 7, the thin film transistor TFT, employed as a switching device, is not formed on an integral protruding tab-like portion of a corresponding scanning signal line 1 but rather is formed on first scanning signal line 1a. That is, a gate electrode of the thin film transistor is rotated 90.degree. so as to be consistent with first scanning signal line 1a, thereby to maximize the aperture ratio of the liquid crystal display.
In the above liquid crystal display as shown in FIGS. 9 and 10, the redundancy connecting portions for connecting the first electrodes of the capacitors or the two-fold scanning signal lines are formed by a simple change of the pattern layout without requiring an additional process. The first electrode is formed to be a ring-type which can utilize a maximum pixel area, thereby enhancing the aperture ratio of the LCD. Since the first electrode of the storage capacitor serves as an additional light shielding layer, the contrast ratio is greatly enhanced.
Additionally, a redundancy connecting portion is formed for connecting the first electrodes of the capacitors to each other, or the scanning signal lines are doubled, so that disconnection and shorting defects of the scanning signal lines in the crossing portions of the wirings can be decreased and repaired. For example, referring to FIG. 10, a disconnection defects occurs with respect to one display signal electrode 5a when disconnections occur at the crossing portions with of first and second scanning signal electrodes 1a and 1b, but not when a disconnection occurs either with first scanning signal electrode 1a or with second scanning signal electrode 1b. In the meantime, when a short circuit occurs between either of the scanning signal electrodes 1a and 1b and the display signal electrode 5a, the shorting defects may be repaired by cutting the signal line on both sides of the crossing portion where the short circuit has occurred. Since the scanning signal electrode is duplicated, the shorting defect may be easily repaired.